1. Field of the Invention
The present invention relates to a manufacturing method for direct-bonded semiconductor wafers, and more specifically, to a method of direct-bonding semiconductor wafers each other.
2. Technical Backgrounds
A conventional manufacturing method for direct-bonded semiconductor wafers, such as Bonded SOI (SILICON ON INSULATOR) wafer, includes a bonding step (B) and a bonding anneal step (C). The bonding step (B) is provided for bonding a substrate wafer 1 to another wafer 2 by bonding jigs. The two wafers are cleaned prior to the bonding step (B). The substrate wafer 1 has one side of a single mirror face. One side of wafer 2 is a single mirror face and has been processed by hot oxidation to form a SiO film of a predetermined thickness. The bonding anneal step (C) is carried out at a predetermined time interval after the bonding step (B). The predetermined time is decided by the operators who judge the situation of the furnace for heating the wafers.
In the above conventional manufacturing method, the time from terminating the bonding step (B) to beginning the bonding anneal step (C) is not the same for different process flows. Moreover, voids 10, i.e., regions where the wafers do not fit together or connect together, will be formed on edge regions of the wafers, as shown in FIG. 8. Direct-bonded wafers with even one void on the edge regions have to be discarded as defective products. In addition, the number of voids increases as the time delay (S) between the bonding step (B) and the bonding anneal step (C) increases.
Moreover, in the prior-art method, an annealing process under a high temperature of over 1000.degree. C. is performed after the bonding step. Therefore, heavy metal impurities originating from the bonding jig while performing bonding, such as Fe, Cr and Ni, become attached to the wafer, and then diffuse into the wafer while annealing. This results in an increase of the current leakage at the pn junction and a shortening of the carrier's lifetime, so that the electrical characteristics of the semiconductor device deteriorate.
In order to increase the yield of the direct-bonded wafers, these problems have to be overcome.